.file	"clock.cpp"
__SREG__ = 0x3f
__SP_H__ = 0x3e
__SP_L__ = 0x3d
__CCP__  = 0x34
__tmp_reg__ = 0
__zero_reg__ = 1
	.global __do_copy_data
	.global __do_clear_bss
	.text
.global	_ZN5Clock4InitEv
	.type	_ZN5Clock4InitEv, @function
_ZN5Clock4InitEv:
/* prologue: function */
/* frame size = 0 */
	ldi r24,lo8(11)
	out 69-32,r24
	ldi r24,lo8(-7)
	out 67-32,r24
	ldi r24,lo8(-128)
	out 87-32,r24
/* epilogue start */
	ret
	.size	_ZN5Clock4InitEv, .-_ZN5Clock4InitEv
.global	__vector_9
	.type	__vector_9, @function
__vector_9:
	push __zero_reg__
	push r0
	in r0,__SREG__
	push r0
	clr __zero_reg__
	push r24
	push r25
	push r26
	push r27
/* prologue: Signal */
/* frame size = 0 */
	lds r24,_ZN5Clock5ticksE
	lds r25,(_ZN5Clock5ticksE)+1
	lds r26,(_ZN5Clock5ticksE)+2
	lds r27,(_ZN5Clock5ticksE)+3
	adiw r24,1
	adc r26,__zero_reg__
	adc r27,__zero_reg__
	sts _ZN5Clock5ticksE,r24
	sts (_ZN5Clock5ticksE)+1,r25
	sts (_ZN5Clock5ticksE)+2,r26
	sts (_ZN5Clock5ticksE)+3,r27
	lds r24,temp_c
	subi r24,lo8(-(1))
	sts temp_c,r24
	cpi r24,lo8(10)
	brne .L5
	sts temp_c,__zero_reg__
	lds r24,_ZL7clock_c
	lds r25,(_ZL7clock_c)+1
	adiw r24,1
	sts (_ZL7clock_c)+1,r25
	sts _ZL7clock_c,r24
.L5:
/* epilogue start */
	pop r27
	pop r26
	pop r25
	pop r24
	pop r0
	out __SREG__,r0
	pop r0
	pop __zero_reg__
	reti
	.size	__vector_9, .-__vector_9
.global	temp_c
.global	temp_c
	.section .bss
	.type	temp_c, @object
	.size	temp_c, 1
temp_c:
	.skip 1,0
.global	_ZN5Clock5ticksE
.global	_ZN5Clock5ticksE
	.type	_ZN5Clock5ticksE, @object
	.size	_ZN5Clock5ticksE, 4
_ZN5Clock5ticksE:
	.skip 4,0
	.lcomm _ZL7clock_c,2